[sebhc] h17 and h8d disk images

Barry Watzman Watzman at neo.rr.com
Wed Sep 1 19:55:58 CDT 2004

I'm absolutely certain that there was a Lifeboat version org'd with a higher
TPA and ROM at zero.  It was, in that regard, the same version of CP/M used
on the original Radio Shack TRS-80, which also had ROM (Microsoft ROM Basic)
at zero, and I worked for months with Larry Alcoff (of Lifeboat) to write
that non-standard version for the H-8 and H-89 (with, at that time, only the
H-17 disk system).  What I'm not sure of with certainty is where the RAM
base and TPA began, I think it was 4200 hex but my recollection is fuzzy on

[You are right, in a sense, "it wasn't really CP/M", although in another
sense it was.  Lifeboat had versions of virtually everything assembled for
the alternate TPA beginning address.]

The Heath version switched to an all-ram environment sometime during the
boot process and never went backwards unless the entire computer was reset.
Larry Plummer was the primary person responsible for working out the
hardware details of converting both the H-8 and H-89 to be able to have 64k
of RAM.

-----Original Message-----
From: sebhc at sebhc.org [mailto:sebhc at sebhc.org] On Behalf Of Dave Dunfield
Sent: Wednesday, September 01, 2004 8:39 PM
To: sebhc at sebhc.org
Subject: Re: [sebhc] h17 and h8d disk images

> The Z80 board didn't require the enhanced board. The older
>8080 machines required the extra board. I'm not
>sure if the CP/M boots to both the H8-4 and H8-5 boards. 
>I'll try to check this out. I most likely won't get to
>it before the weekend. I have both boards so I can try it.
>HDOS will boot to either board.

Barry mentioned that there might be a Lifeboat version orged
higher in memory - possibly it will work with the H5 and
standard CPU board (no RAM at zero) - if so, I would love to
get a copy.

Still - CP/M isn't really CP/M if it can't run programs at
$100 - so ideally, I would like to find a version which is
configured for H5 console I/O, and works with the RAM at zero
feature, but basically requires no other "special" features...
Does such an animal exist?

Does anyone know if CP/M just switches to RAM once, or does
it toggle between ROM and RAM (say to access ROM functions)?

My address space is a single 64K 8086 segment - to handle a
"real" switch, I would have to rewrite and slow down the accesses
to main memory in the CPU emulator (and there are a fair number).
If it only does it infrequently, I could get away with just copying
the RAM/ROM content in and out of the address space, and updating
my write protect table...

dave04a (at)    Dave Dunfield
dunfield (dot)  Firmware development services & tools: www.dunfield.com
com             Vintage computing equipment collector.

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