[sebhc] Re: Re-creating actual floppies from archive

[Lee Hart]

>> What was the problem with these anyway?
>> Is it a race problem or a glitch problem?

> I was hoping that the original poster could expand on either the
> problem or the time line to see how it wouldn't affect the H8-4.

It's been a long time, and I've forgotten the details. But I ran across
it when I was designing the H-1000 (a replacement CPU board for the
H89). The old 8250 had a bus fight problem with the Z80 at 4 MHz, and
both new and old 8250 had problems at both 2 MHz and 4 MHz. National had
an application note that outlined the problem.

When you compare the H89 and H89-A schematics, you'll see Heath added a
74LS74 between the buffered read and write lines (/BRD and /BWR) and the
8250's Data In Strobe (DISTR) and Data Out Strobe (/DOSTR) pins. My
guess is that the 8250 was slow at taking its data off the bus during
reads, and slow at latching its data in on writes. So they flip-flop was
added to move the timing to avoid bus fights with the Z80.
-- 
Ring the bells that still can ring
Forget the perfect offering
There is a crack in everything
That's how the light gets in    --    Leonard Cohen
--
Lee A. Hart, 814 8th Ave N, Sartell MN 56377, leeahart_at_earthlink.net
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