[sebhc] hard sector substitute
melamy at earthlink.net
Tue Jun 29 18:20:06 CDT 2004
comments filled-in below...
best regards, Steve Thatcher
*From: Lee Hart <leeahart at earthlink.net>
*Sent: Jun 29, 2004 2:43 PM
*To: sebhc at sebhc.org
*Subject: Re: [sebhc] hard sector substitute
*I'm speaking anecdotally and from memory, so please allow for errors.
*But to save money, this feature was left out of most PC drives; instead, they have an extra
*crystal in the disk controller, and read/write even low-density data at
*the higher speed.
this would only make the newer drives not usable for the old controllers.
> I have been thinking about a PIC that would be able to not only
> supply the missing hard sector pulses, but also be able to remove
> them from hard sector disks.
*I built a circuit to do this years ago. A CMOS phase locked loop chip
*used the single index hole of a soft-sector disk to create a 10x clock.
*This clock was ANDed in with the real index pulse to produce the 11
*pulses per revolution to fool an H17 controller and software into
*thinking it was a hard-sector disk.
a PIC could do better than a PLL in that it could do more adjustments on the fly that the PLL takes a whole rotation to correct.
> I don't think rotational stability will be an issue.
*It worked, but not very reliably. The disk drive needed good speed
*stability, and the disks had to rotate easily in their sleeves. I had
*too many disk drives and disks for which this wasn't true.
the PIC could adjust it's time base on data coming from the drive too so index hole position would be more accurate even during a single rotation
> If that were the case then DD SS disks would be problematic.
*Except that soft-sector disk controllers extract the clock from the data
*stream itself. There can be substantial variations in disk rotation
*speed and the data can still be recovered. It's the same as tape
*recorder that runs at the wrong speed; the pitch may be wrong or even
*vary moment to moment, but everything is perfectly intelligible.
*In the old days, they tried to make the disk drive rotation speed
*precise, and so simplify the hardware in the controller. We went from
*synchronous motors in 8" drives (perfect speed control) to
*servo-controlled motors in full-height 5.25" drives (1% accuracy), to
*open-loop direct-drive motors in half-height 5.25" and 3.5" drives (2%),
*and in some extremes (Commodore and Macs) no speed control at all (5% or
non-issue for hard sector disks - the only issue is when the index hole happens and data starts being
read or written. With a PIC design, even the data coming from the disk could be used to adjust the rate of the index hole. Soft sector does get separet out data and clock, but it still needs a certain about of stability (same idea as serial data streams used in RS232. A certain amout of mismatch between the writing clock and the drive that it is being read in is expected and that is why the sync areas are generated between SS sectors.
> The only latency issue with regards to hard sector disks would
> be the computer response time to "seeing" the index hole and when
> it really starts writing the sector data.
*Yes. My PLL circuit took a couple rotations of the disk to "sync up".
*This is inherently longer than a real disk takes to get up to speed.
at least for N* that we are talking about, the controller give the drives more than a second to come up to speed, so the lock time is not a problem.
> The PIC would work for both 5 1/4" and 8" drives and be smart
> enough to adjust itself based on the index hole. A few jumpers
> on it would set it for how many sector pulses to generate
> (1, 10, 16) and what drive size.
*I'm sure a PIC could do it, but it is a *challenging* software problem
*in real-time control!
that is what makes it fun to do and quite up my alley so to speak given my decades of hardware and software development in real-time control.
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