[sebhc] list archive and a specific question

[Dan Lanciani]

| You'd most likely just need to add an address decoder.

There's a lot more to it than that.  Ignoring the generic bus conversion
issues, the method used to synchronize the CPU with DRQ is very different.
The Z100 controller uses the common approach of hanging the CPU's data port
read/write until the controller is ready.  The H8 controller (if I'm
remembering correctly) inserts itself between the bus and the interrupt
instruction generator (the buffer that puts the RST n instruction on the bus)
so it can push a NOP onto the bus after waking the CPU from an HLT used to
wait for DRQ.  The inner loop is just fast enough to handle 5.25" DD.

The HLT scheme is why the H8's H37 controller needed that ribon cable to
the CPU card.   Interestingly, I did get this to work with a third-party
(DG) Z80 CPU board.

				Dan Lanciani
				ddl at danlan.*com
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